DATA SH EET
Product specification
Supersedes data of 2000 Oct 04 2000 Dec 20
DISCRETE SEMICONDUCTORS
BLF1046
UHF power LDMOS transistor
M3D381
2000 Dec 20 2
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
FEATURES
•High power gain
•Easy power control
•Excellent ruggedness
•Source on underside eliminates DC isolators, reducing
common mode inductance
•Designed for broadband operation (HF to 1 GHz).
APPLICATIONS
•Communication transmitter applications in the UHF
frequency range.
DESCRIPTION
Silicon N-channel enhancement mode lateral D-MOS
transistor encapsulated in a 2-lead flange package
(SOT467C) with a ceramic cap. The common source is
connected to the mounting flange.
PINNING - SOT467C
PIN DESCRIPTION
1 drain
2 gate
3 source, connected to flange
1
3
2
Top view
MBK584
Fig.1 Simplified outline.
QUICK REFERENCE DATA
RF performance at Th=25°C in the common source broadband test circuit.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
MODE OF OPERATION f
(MHz) VDS
(V) PL
(W) Gp
(dB) ηD
(%) dim
(dBc)
CW, class-AB (2-tone) f1= 960; f2= 960.1 26 45 (PEP) >14 >35 ≤−26
CW, class-AB (1-tone) 960 26 45 >14 >46 −
SYMBOL PARAMETER MIN. MAX. UNIT
VDS drain-source voltage −65 V
VGS gate-source voltage −±20 V
IDdrain current (DC) −4.5 A
Tstg storage temperature −65 +150 °C
Tjjunction temperature −200 °C
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
2000 Dec 20 3
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
THERMAL CHARACTERISTICS
Note
1. Determined under specified RF operating conditions, based on maximum peak junction temperature.
CHARACTERISTICS
Tj=25°C unless otherwise specified.
APPLICATION INFORMATION
RF performance in the common source class-AB broadband test circuit. Th=25°C; Rth j-h = 1.87 K/W,
unless otherwise specified.
Ruggedness in class-AB operation
The BLF1046 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the
following conditions: VDS = 26 V; f = 960 MHz at rated load power.
Tuning Procedure
For high gain and efficiency:
In CW mode (PD= 1 W; f = 960 MHz) tune C2 and C16 (see Figs. 13 and 14) until IRL < −15 dB, then adjust C6 and C8
for high gain until Gp> 14 dB at PL=50W.
For linear mode:
Tune for high gain and efficiency mode, then apply two tone signal (f1= 960 MHz; f2= 960.1 MHz) at PL= 45 W (PEP)
and tune first C2 and then C6 and C8 for lowest d3 (below −28 dBc).
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth j-h thermal resistance from junction to
heatsink Th=25°C; Pdis = 97 W; note 1 1.87 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V(BR)DSS drain-source breakdown voltage VGS = 0; ID= 0.7 mA 65 −−V
V
GSth gate-source threshold voltage VDS = 10 V; ID=70mA 4 −5V
I
DSS drain-source leakage current VGS = 0; VDS =26V −−1µA
I
DSX drain cut-off current VGS =V
GSth +9V; V
DS = 10 V 12.5 −−A
I
GSS gate leakage current VGS =±20 V; VDS =0 −−125 nA
gfs forward transconductance VDS = 10 V; ID= 3.5 A −2−S
RDSon drain-source on-state resistance VGS =V
GSth +9V; I
D= 3.5 A −300 −mΩ
Cis input capacitance VGS = 0; VDS = 26 V; f = 1 MHz −46 −pF
Cos output capacitance VGS = 0; VDS = 26 V; f = 1 MHz −37 −pF
Crs feedback capacitance VGS = 0; VDS = 26 V; f = 1 MHz −1.5 −pF
MODE OF OPERATION f
(MHz) VDS
(V) IDQ
(mA) PL
(W) Gp
(dB) ηD
(%) dim
(dBc)
CW, class-AB (2-tone) f1= 960; f2= 960.1 26 300 45 (PEP) >14 >35 ≤−26
CW, class-AB (1-tone) 960 26 300 45 >14 >46 −
2000 Dec 20 4
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
handbook, halfpage
020 P
L
(W)
Gp
(dB)
60
20
15
5
0
10
ηD
(%)
80
60
20
0
40
40
MLD455
ηD
Gp
PAE
Fig.2 Powergainanddrainefficiencyasfunctions
of load power; typical values.
VDS = 26 V; IDQ = 330 mA; Th≤25 °C; f = 960 MHz;
tuned for high efficiency; see tuning procedure.
handbook, halfpage
020 P
L
(W)
Gp
(dB)
40 80
20
15
5
0
10
60
MLD456
ηD
(%)
Gp
ηD
80
60
20
0
40
Fig.3 Powergainanddrainefficiencyasfunctions
of load power; typical values.
VDS = 26 V; IDQ = 330 mA; Th≤25 °C; f = 960 MHz;
tuned for high linearity; see tuning procedure
handbook, halfpage
010 P
L
(PEP) (W)
Gp
(dB)
50
20
15
5
0
10
20 30 40
MLD457
ηD
(%)
(1)
(3) (2)
ηD
80
60
20
0
40
Fig.4 Powergainanddrainefficiencyasfunctions
of peak envelope power; typical values.
VDS = 26 V; Th≤25 °C; f1= 960 MHz; f2= 960.1 MHz;
tuned for high linearity; see tuning procedure.
(1) IDQ = 240 mA.
(2) IDQ = 300 mA.
(3) IDQ = 400 mA.
handbook, halfpage
010 P
L
(PEP) (W)
d3
(dB)
50
0
−20
−60
−80
−40
20 30 40
MLD458
(1)
(2)
(3)
Fig.5 Third order intermodulation distortion as a
function of peak envelope load power;
typical values.
VDS = 26 V; Th≤25 °C; f1= 960 MHz; f2= 960.1 MHz;
tuned for high linearity; see tuning procedure.
(1) IDQ = 240 mA.
(2) IDQ = 300 mA.
(3) IDQ = 400 mA.
2000 Dec 20 5
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
handbook, halfpage
010 P
L
(PEP) (W)
d5
(dBc)
50
0
−20
−60
−80
−40
20 30 40
MLD459
(1)
(3)
(2)
VDS = 26 V; Th≤25 °C; f1= 960 MHz; f2= 960.1 MHz;
tuned for high linearity; see tuning procedure.
(1) IDQ = 240 mA.
(2) IDQ = 300 mA.
(3) IDQ = 400 mA.
Fig.6 Fifth order intermodulation distortion as a
function of peak envelope load power;
typical values.
handbook, halfpage
010 P
L
(PEP) (W)
d7
(dBc)
50
0
−20
−60
−80
−40
20 30 40
MLD460
(1)
(2)
(3)
VDS = 26 V; Th≤25 °C; f1= 960 MHz; f2= 960.1 MHz;
tuned for high linearity; see tuning procedure.
(1) IDQ = 240 mA.
(2) IDQ = 300 mA.
(3) IDQ = 400 mA.
Fig.7 Seventh order intermodulation distortion as
a function of peak envelope load power;
typical values.
handbook, halfpage
020
10
0
2
4
6
8
4 8 12 16 PL (W)
EVM
(%)
MLD461
peak
rms
Fig.8 Error vector magnitude (EVM) / EDGE
8PSK as a functions of load power; typical
values.
VDS = 26 V; IDQ = 300 mA; Th≤25 °C; f = 960 MHz;
tuned for high linearity; see tuning procedure.
handbook, halfpage
04 P
L
(W)
Gp
(dB)
20
20
15
5
0
10
81216
MLD462
η
(%)
Gp
EVM
(%)
η
40
30
10
0
20
EVM
Fig.9 EDGE 8PSK EVM, gain and efficiency as
functions of load power; typical values.
VDS = 26 V; IDQ = 300 mA; Th≤25 °C; f = 960 MHz;
tuned for high linearity; see tuning procedure.
2000 Dec 20 6
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
handbook, halfpage
04 P
L
(W)
ACPR
(dBc)
20
0
−20
−60
−80
−40
81216
MLD463
200 KHz
250 KHz
400 KHz
Fig.10 EDGE 8PSK adjacent channel power as a
function of load power; typical values.
VDS = 26 V; IDQ = 300 mA; Th≤25 °C; f = 960 MHz;
tuned for high linearity; see tuning procedure.
Measured EDGE channel bandwidth 270 kHz and adjacent
channels bandwidth 30 kHz.
handbook, halfpage
0
850 900 f (MHz) 1000
20
15
5
10
0
80
60
20
40
950
MLD464
Gp
(dB) ηD
(%)
Gp
ηD
Fig.11 Powergainanddrainefficiencyasfunctions
of frequency; typical values.
VDS = 28 V; IDQ = 300 mA; PL= 45 W (PEP); Th≤25 °C;
tuned for high linearity; see tuning procedure
Measured in broadband test circuit; see Figs. 15 and 16.
handbook, halfpage
−80
850 900
d3
d5
d7
f (MHz) 1000
0
−20
−60
−40
950
MLD465
dim
(dBc)
Fig.12 Intermodulation distortion as a function of
frequency; typical values.
VDS = 28 V; IDQ = 300 mA; PL= 45 W (PEP); Th≤25 °C;
tuned for high linearity; see tuning procedure
Measured in broadband test circuit; see Figs. 15 and 16.
2000 Dec 20 7
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
handbook, halfpage
840 880
ri
xi
f (MHz)
Zi
(Ω)
920 960
4
2
−2
−4
0
MLD468
Fig.13 Optimal source impedance as a function of
frequency (series components);
typical values.
VDS = 26 V; IDQ = 300 mA; PL= 45 W; Th≤25 °C;
tuned for high linearity; see tuning procedure.
handbook, halfpage
840 880
RL
XL
f (MHz)
ZL
(Ω)
920 960
4
2
−2
−4
0
MLD469
Fig.14 Optimal load impedance as a function of
frequency (series components);
typical values.
VDS = 26 V; IDQ = 300 mA; PL= 45 W; Th≤25 °C;
tuned for high linearity; see tuning procedure.
2000 Dec 20 8
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
handbook, full pagewidth
C16
C5
C1
L3 L4
L6
L7
L5
L2
L8
L1
R4
F1
R1 R5
R3
R2
50 Ω
input
C7
C2
C4
C6
C8
C3
C11
L9 50 Ω
output
C10
C13
C15C14
C9
VDS (26 V)
MLD466
Fig.15 Class-AB broadband test circuit at f = 800 to 1000 MHz.
handbook, full pagewidth
C11
TRGD
C1
C12
C7
C5
C14
+ 26 V ground
C15
L2
L1 C3
R5
R3
R1
R2
R4
C13
C9
C10
F1
C4
C2
39 mm
C16
MLD467
C8
output
input
C6
IDQ adjustment
Fig.16 Component layout for 800 to 1000 MHz class-AB broadband test circuit.
Dimensions in mm.
The components are situated on one side of the copper-clad printed-circuit board with Teflon dielectric (εr= 2.2), thickness 0.79 mm.
The other side is unetched and serves as a ground plane.
2000 Dec 20 9
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
List of components (see Figs 15 and 16)
Notes
1. American Technical Ceramics type 100B or capacitor of same quality.
2. The striplines are on a double copper-clad printed-circuit board with Teflon dielectric (εr = 2.2); thickness 0.79 mm.
COMPONENT DESCRIPTION VALUE DIMENSIONS CATALOGUE NO.
C1, C7 multilayer ceramic chip capacitor; note 1 33 pF
C2, C6 Tekelec variable capacitor 0.8 to 8.2 pF
C3, C4 multilayer ceramic chip capacitor; note 1 13 pF
C5 multilayer ceramic chip capacitor; note 1 7.5 pF
C8, C16 Tekelec variable capacitor 0.5 to 4.6 pF
C9, C11 multilayer ceramic chip capacitor; note 1 33 pF
C10, C12 multilayer ceramic chip capacitor; note 1 150 pF
C13, C14 multilayer ceramic chip capacitor 33 nF
C15 electrolytic capacitor 47 µF; 63 V
F1 Ferroxcube chip-bead 8DS3/3/8/9-4S2 4330 030 36301
L1 5 turns enamelled 0.6 mm copper wire int. dia.=4mm;
length = 5 mm
L2 2 turns enamelled 0.6 mm copper wire int. dia.=4mm;
length = 1.6 mm
L3 stripline; note 2 50 Ω16 ×2.36 mm
L4 stripline; note 2 42.5 Ω16 ×3.1 mm
L5 stripline; note 2 14.3 Ω6×12 mm
L6 stripline; note 2 20.2 Ω3×8mm
L7 stripline; note 2 14.3 Ω14 ×12 mm
L8 stripline; note 2 40 Ω17 ×3.4 mm
L9 stripline; note 2 50 Ω7×2.36 mm
R1, R5 metal film resistor 10 kΩ, 0.6 W
R2 variable resistor 10 kΩ
R3 metal film resistor 1 kΩ, 0.6 W
R4 metal film resistor 10 Ω, 0.6 W
2000 Dec 20 10
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
PACKAGE OUTLINE
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT467C 99-12-06
99-12-28
0 5 10 mm
scale
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads
0.15
0.10
5.59
5.33 9.25
9.04 1.65
1.40 18.54
17.02
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
3.43
3.18
4.67
3.94 2.21
1.96
D
D1
U1
1
3
2
A
U2E
E1
p
b
H
Q
F
c
UNIT Q
cD
9.27
9.02
D1
5.92
5.77
E
5.97
5.72
E1FH p q
mm
0.184
0.155
inch
b
14.27 20.45
20.19
U2
U1
5.97
5.72 0.25
w1
0.51
0.006
0.004
0.220
0.210 0.364
0.356 0.065
0.055 0.73
0.67 0.135
0.125 0.087
0.077
0.365
0.355 0.233
0.227 0.235
0.225 0.562 0.805
0.795 0.235
0.225 0.010 0.020
w2
A
M M
C
C
Aw1
w2
AB
M M M
q
B
SOT467C
2000 Dec 20 11
Philips Semiconductors Product specification
UHF power LDMOS transistor BLF1046
DATA SHEET STATUS
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DATA SHEET STATUS PRODUCT
STATUS DEFINITIONS (1)
Objective specification Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification Production This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyother conditionsabovethose giveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythat suchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorselling theseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseof anyoftheseproducts,conveys nolicenceortitle
under any patent, copyright, or mask work right to these
products,and makesnorepresentations orwarrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified
© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
2000 70
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Printed in The Netherlands 613524/07/pp12 Date of release: 2000 Dec 20 Document order number: 9397 750 07658